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Self-Checking and Fault-Tolerant Digital Design
Contributor(s): Lala, Parag K. (Author)
ISBN: 0124343708     ISBN-13: 9780124343702
Publisher: Morgan Kaufmann Publishers
OUR PRICE:   $113.85  
Product Type: Hardcover - Other Formats
Published: June 2000
Qty:
Annotation:
With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.


"Self-Checking and Fault-Tolerant Digital Design" deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.
* Introduces reliability theory and the importance of maintainability
* Presents coding and the construction of several error detecting and correcting codes
* Discusses in depth, the available techniques for fail-safe design of combinational circuits
* Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits
* Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
Additional Information
BISAC Categories:
- Technology & Engineering | Electronics - Circuits - Vlsi & Ulsi
- Technology & Engineering | Electrical
- Computers | Intelligence (ai) & Semantics
Dewey: 004.2
LCCN: 98-52157
Series: The Morgan Kaufmann Computer Architecture and Design
Physical Information: 0.72" H x 7.67" W x 9.62" (1.35 lbs) 400 pages
 
Descriptions, Reviews, Etc.
Publisher Description:


With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.


Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.