Creating Assertion-Based IP Contributor(s): Foster, Harry D. (Author), Krolnik, Adam C. (Author) |
|
ISBN: 1441942181 ISBN-13: 9781441942180 Publisher: Springer OUR PRICE: $113.99 Product Type: Paperback - Other Formats Published: November 2010 |
Additional Information |
BISAC Categories: - Technology & Engineering | Electronics - Circuits - General - Technology & Engineering | Electrical - Computers | Cad-cam |
Dewey: 621.3 |
Series: Integrated Circuits and Systems |
Physical Information: 0.7" H x 6.14" W x 9.21" (1.04 lbs) 318 pages |
Descriptions, Reviews, Etc. |
Publisher Description: Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user's existing verification environment, in other words the testbench infrastructure. The guiding principles promoted in this book when creating an assertion-based IP monitor are:
A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors' experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers. From the Foreword: Creating Assertion-Based IP "...reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP...This book will serve as a valuable reference for years to come." Andrew Piziali, Sr. Design Verification EngineerCo-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology Author, Functional Verification Coverage Measurement and Analysis |