Writing Testbenches: Functional Verification of Hdl Models Softcover Repri Edition Contributor(s): Bergeron, Janick (Author) |
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ISBN: 1461350123 ISBN-13: 9781461350125 Publisher: Springer OUR PRICE: $237.49 Product Type: Paperback - Other Formats Published: October 2012 |
Additional Information |
BISAC Categories: - Computers | Compilers - Computers | Hardware - Personal Computers - General - Medical | Anesthesiology |
Dewey: 621.381 |
Physical Information: 1.03" H x 6.14" W x 9.21" (1.56 lbs) 478 pages |
Descriptions, Reviews, Etc. |
Publisher Description: mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches- all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test- benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification. |