Speculative Execution in High Performance Computer Architectures Contributor(s): Kaeli, David (Editor), Yew, Pen-Chung (Editor) |
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ISBN: 1584884479 ISBN-13: 9781584884477 Publisher: CRC Press OUR PRICE: $199.50 Product Type: Hardcover - Other Formats Published: March 2005 Annotation: Until now, there was no reference book that focused on the dynamic subject of speculative execution, a topic that is crucial to the development of high performance computer architectures. Speculative Execution in High Performance Computer Architectures describes many recent advances in speculative execution techniques. It covers cutting-edge research projects, as well as numerous commercial implementations that demonstrate the value of this latency-hiding technique. |
Additional Information |
BISAC Categories: - Computers | Systems Architecture - General - Computers | Operating Systems - General - Computers | Programming - Games |
Dewey: 004.35 |
LCCN: 2005041310 |
Series: Chapman & Hall/CRC Computer and Information Science |
Physical Information: 1.14" H x 6.42" W x 9.5" (1.69 lbs) 456 pages |
Descriptions, Reviews, Etc. |
Publisher Description: Until now, there were few textbooks that focused on the dynamic subject of speculative execution, a topic that is crucial to the development of high performance computer architectures. Speculative Execution in High Performance Computer Architectures describes many recent advances in speculative execution techniques. It covers cutting-edge research projects, as well as numerous commercial implementations that demonstrate the value of this latency-hiding technique. The book begins with a review of control speculation techniques that use instruction cache prefetching, branch prediction and predication, and multi-path execution. It then examines dataflow speculation techniques including data cache prefetching, address value and data value speculation, pre-computation, and coherence speculation. This textbook also explores multithreaded approaches, emphasizing profile-guided speculation, speculative microarchitectures, and compiler techniques. |