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Memory Systems: Cache, Dram, Disk
Contributor(s): Jacob, Bruce (Author), Wang, David (Author), Ng, Spencer (Author)
ISBN: 0123797519     ISBN-13: 9780123797513
Publisher: Morgan Kaufmann Publishers
OUR PRICE:   $114.30  
Product Type: Hardcover - Other Formats
Published: September 2007
Qty:
Temporarily out of stock - Will ship within 2 to 5 weeks
Annotation: Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem.
The book tells you everything you need to know about the logical design and operation, physical design and operation, performance characteristics and resulting design trade-offs, and the energy consumption of modern memory hierarchies. You learn how to to tackle the challenging optimization problems that result from the side-effects that can appear at any point in the entire hierarchy.
As a result you will be able to design and emulate the entire memory hierarchy.
??? Understand all levels of the system hierarchy -Xcache, DRAM, and disk.
??? Evaluate the system-level effects of all design choices.
??? Model performance and energy consumption for each component in the memory hierarchy.
Additional Information
BISAC Categories:
- Computers | Systems Architecture - General
- Computers | System Administration - Storage & Retrieval
Dewey: 004.5
Physical Information: 1.74" H x 7.34" W x 9.44" (4.11 lbs) 900 pages
 
Descriptions, Reviews, Etc.
Publisher Description:
Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem.

The book tells you everything you need to know about the logical design and operation, physical design and operation, performance characteristics and resulting design trade-offs, and the energy consumption of modern memory hierarchies. You learn how to to tackle the challenging optimization problems that result from the side-effects that can appear at any point in the entire hierarchy.

As a result you will be able to design and emulate the entire memory hierarchy.