Fully-Depleted Soi CMOS Circuits and Technology for Ultralow-Power Applications 2006 Edition Contributor(s): Sakurai, Takayasu (Author), Matsuzawa, Akira (Author), Douseki, Takakuni (Author) |
|
ISBN: 0387292179 ISBN-13: 9780387292175 Publisher: Springer OUR PRICE: $161.49 Product Type: Hardcover - Other Formats Published: May 2006 Annotation: The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits. |
Additional Information |
BISAC Categories: - Computers | Hardware - Personal Computers - General - Technology & Engineering | Electronics - Circuits - General - Technology & Engineering | Electrical |
Dewey: 621.397 |
Physical Information: 0.9" H x 6.4" W x 9.74" (2.00 lbs) 411 pages |
Descriptions, Reviews, Etc. |
Publisher Description: Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. |