System-On-A-Chip Verification: Methodology and Techniques 2002 Edition Contributor(s): Rashinkar, Prakash (Author), Paterson, Peter (Author), Singh, Leena (Author) |
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ISBN: 0792372794 ISBN-13: 9780792372790 Publisher: Springer OUR PRICE: $161.49 Product Type: Hardcover - Other Formats Published: December 2000 Annotation: System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; andLimitations of the option. This exciting new book will be of interest to all designers and test professionals. |
Additional Information |
BISAC Categories: - Computers | Logic Design - Computers | Software Development & Engineering - Systems Analysis & Design - Technology & Engineering | Electrical |
Dewey: 621.395 |
LCCN: 00052567 |
Physical Information: 1.07" H x 6.5" W x 9.62" (1.70 lbs) 372 pages |
Descriptions, Reviews, Etc. |
Publisher Description: This is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign-off. All the verification aspects in this exciting new book are illustrated with a single reference design for Bluetooth application. |