| Iddq Testing for CMOS VLSI Contributor(s): Rajsuman, Rochit (Author) |
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ISBN: 0890067260 ISBN-13: 9780890067260 Publisher: Artech House Publishers OUR PRICE: $47.50 Product Type: Hardcover Published: January 1995 Annotation: This book discusses in detail the correlation between physical defects and logic faults, and shows you how lddq testing locates these defects. |
| Additional Information |
| BISAC Categories: - Technology & Engineering | Electronics - Solid State - Technology & Engineering | Electronics - Digital - Technology & Engineering | Electrical |
| Dewey: 621.395 |
| LCCN: 94021066 |
| Series: Artech House Optoelectronics Library |
| Physical Information: 0.67" H x 6.21" W x 9.33" (0.88 lbs) 193 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: Provides coverage of IDDQ testing, including discussion of the correlation between physical defects and logical faults, and how IDDQ testing detects these defects. This title presents information on test generation for IDDQ testing; use of stuck-at and random vectors for IDDQ testing; use of IDDQ testing in factory production lines; cost benefit analysis; instrumentation issues; off-chip and on-chip current senors; ATE interface; case studies with memories and microprocessors; and proposed IEE QTAG standards. It also supplies planning guidelines and optimization methods, together with numerous examples ranging from simple circuits to extensive case studies. It should be useful as a reference for designers and test engineers. |