| Writing Testbenches: Functional Verification of Hdl Models 2003 Edition Contributor(s): Bergeron, Janick (Author) |
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ISBN: 1402074018 ISBN-13: 9781402074011 Publisher: Springer OUR PRICE: $237.49 Product Type: Hardcover - Other Formats Published: February 2003 |
| Additional Information |
| BISAC Categories: - Computers | Compilers - Technology & Engineering | Electrical - Computers | Hardware - Personal Computers - General |
| Dewey: 621.381 |
| LCCN: 2003041995 |
| Physical Information: 1.08" H x 6.42" W x 9.5" (1.82 lbs) 478 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches- all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test- benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification. |