| An Introduction to Logic Circuit Testing Contributor(s): Lala, Parag K. (Author) |
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ISBN: 1598293508 ISBN-13: 9781598293500 Publisher: Morgan & Claypool OUR PRICE: $33.25 Product Type: Paperback Published: October 2008 * Not available - Not in print at this time * |
| Additional Information |
| BISAC Categories: - Computers | Logic Design |
| Dewey: 621.395 |
| Series: Synthesis Lectures on Digital Circuits and Systems |
| Physical Information: 0.23" H x 7.5" W x 9.25" (0.45 lbs) 112 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References |