| Embedded Multiprocessors: Scheduling and Synchronization Contributor(s): Sriram, Sundararajan (Author), Bhattacharyya, Shuvra S. (Author) |
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ISBN: 1420048015 ISBN-13: 9781420048018 Publisher: CRC Press OUR PRICE: $237.50 Product Type: Hardcover - Other Formats Published: February 2009 Annotation: Embedded Processors discusses how to design and analyze multiprocessor computer systems that are streamlined for multimedia applications. This second edition features two new chapters that focus exclusively on dataflow background. The first chapter provides an up-to-date survey of computation dataflow models for multimedia systems, while the second chapter presents current techniques for synchronous dataflow. The book also discusses architectures such as platform field programmable gate arrays, new high performance programmable digital signal processors, recent advancements in scheduling techniques, as well as new transaction methods that take into account communication costs. |
| Additional Information |
| BISAC Categories: - Computers | Microprocessors - Computers | Computer Engineering - Computers | Hardware - Personal Computers - General |
| Dewey: 004.16 |
| LCCN: 2008050949 |
| Series: Signal Processing and Communications |
| Physical Information: 1" H x 6.2" W x 9.3" (1.45 lbs) 384 pages |
| Descriptions, Reviews, Etc. |
| Publisher Description: Techniques for Optimizing Multiprocessor Implementations of Signal Processing Applications An indispensable component of the information age, signal processing is embedded in a variety of consumer devices, including cell phones and digital television, as well as in communication infrastructure, such as media servers and cellular base stations. Multiple programmable processors, along with custom hardware running in parallel, are needed to achieve the computation throughput required of such applications. Reviews important research in key areas related to the multiprocessor implementation of multimedia systemsEmbedded Multiprocessors: Scheduling and Synchronization, Second Edition presents architectures and design methodologies for parallel systems in embedded digital signal processing (DSP) applications. It discusses application modeling techniques for multimedia systems, the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, and a modeling methodology (the synchronization graph) for multiprocessor system performance analysis. The book also applies the synchronization graph model to develop hardware and software optimizations that can significantly reduce the interprocessor communication overhead of a given schedule. Chronicles recent activity dealing with single-chip multiprocessors and dataflow modelsThis edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition. Harness the power of multiprocessorsThis book explores the optimization of interprocessor communication and synchronization in embedded multiprocessor systems. It shows you how to design multiprocessor computer systems that are streamlined for multimedia applications. |